John Wiley, 2008. — 388 p.
Digital signal processing (DSP) is used in a very wide range of applications from high-definition TV, mobile telephony, digital audio, multimedia, digital cameras, radar, sonar detectors, biomedical imaging, global positioning, digital radio, speech recognition, to name but a few! The topic has been driven by the application requirements which have only been possible to realize because of development in silicon chip technology. Developing both programmable DSP chips and dedicated system-on-chip (SoC) solutions for these applications, has been an active area of research and development over the past three decades. Indeed, a class of dedicated microprocessors have evolved particularly targeted at DSP, namely DSP microprocessors or DSPμs.
The increasing costs of silicon technology have put considerable pressure on developing dedicated SoC solutions and means that the technology will be used increasingly for high-volume or specialist markets. An alternative is to use microprocessor style solutions such as microcontrollers, microprocessors and DSP micros, but in some cases, these offerings do not match well to the speed, area and power consumption requirements of many DSP applications. More recently, the field-programmable gate array (FPGA) has been proposed as a hardware technology for DSP systems as they offer the capability to develop the most suitable circuit architecture for the computational, memory and power requirements of the application in a similar way to SoC systems. This has removed the preconception that FPGAs are only used as ‘glue logic’ platform and more realistically shows that FPGAs are a collection of system components with which the user can create a DSP system. Whilst the prefabricated aspect of FPGAs avoids many of the deep submicron problems met when developing system-on-chip (SoC) implementations, the ability to create an efficient implementation from a DSP system description, remains a highly convoluted problem.
The book looks to address the implementation of DSP systems using FPGA technology by aiming the discussion at numerous levels in the FPGA implementation flow. First, the book covers circuit level, optimization techniques that allow the underlying FPGA fabric of localized memory in the form of lookup tables (LUTs) and flip-flops along with the logic LUT resource, to be used more intelligently. By considering the specific DSP algorithm operation in detail, it is shown that it is possible to map the system requirements to the underlying hardware, resulting in a more area-efficient, faster implementation. It is shown how the particular nature of some DSP systems such as DSP transforms (fast Fourier transform (FFT) and discrete cosine transform (DCT)) and fixed coefficient filtering, can be exploited to allow efficient LUT-based FPGA implementations.
Secondly, the issue of creating efficient circuit architecture from SFG representations is considered. It is clear that the development of a circuit architecture which efficiently uses the underlying resource to match the throughput requirements, will result in the most cost-effective solution. This requires the user to exploit the highly regular, highly computative, data-independent nature of DSP systems to produce highly parallel, pipelined circuit architectures for FPGA implementation. The availability of multiple, distributed logic resources and dedicated registers, make this type of approach, highly attractive. Techniques are presented to allow the circuit architecture to be created with the necessary levels of parallelism and pipelining, resulting in the creation of highly efficient circuit architectures for the system under consideration.
Finally, as technology has evolved, FPGAs have now become a heterogeneous platform involving multiple hardware and software components and interconnection fabrics. It is clear that there is a strong desire for a true system-level design flow, requiring a much higher level system modelling language, in this case, dataflow. It is shown how the details of the language and approach must facilitate the kind of optimizations carried out to create the hardware functionality as outlined in the previous paragraph, but also to address system-level considerations such as interconnection and memory. This is a highly active area of research at present.
The book covers these three areas of FPGA implementation with a greater concentration on the latter two areas, namely that of the creation of the circuit architectures and the system level modelling, as these represent a more recent challenge; moreover, the circuit level optimization techniques have been covered in greater detail in many other places. It is felt that this represents a major differentiating factor between this book and other many other texts with a focus on FPGA implementation of DSP systems.
In all cases, the text looks to back up the description with the authors’ experiences in implementing real DSP systems. A number of examples are covered in detail, including the development of an adaptive beamformer which gives a detailed description of the creation of an QR-based RLS filter. The design of an adaptive differential pulse-coded modulation (ADPCM) speech compression system is described. Throughout the text, finite impulse response (FIR) and infinite impulse response (IIR) filters are used to demonstrate the mapping and introduce retiming. The low-power optimizations are demonstrated using a FFT-based application and the development of hierarchical retiming, demonstrated using a wave digital filter (WDF).
In addition to the modelling and design aspect, the book also looks at the development of intellectual property (IP) cores as this has become a critical aspect in the creation of DSP systems. With the absence of relevant, high-level design tools, designers have resorted to creating reusable component blocks as a way of reducing the design productivity gap; this is the gap that has appeared between the technology and the designers’ ability to use it efficiently. A chapter is given over to describing the creation of such IP cores and another chapter dedicated to the creation of a core for an important form of adaptive filtering, namely, recursive least-squares (RLS) filtering.
The book will be aimed at working engineers who are interested in using FPGA technology to its best in signal processing applications. The earlier chapters would be of interest to graduates and students completing their studies, taking the readers through a number of simple examples that show the various trade-offs when mapping DSP systems into FPGA hardware. The middle part of the book contains a number of illustrative, complex DSP systems that have been implemented using FPGAs and whose performance clearly illustrates the benefit of it use. These examples include: matrix multiplication, adaptive filtering systems for electronic support measures, wave digital filters, and adaptive beamformer systems based on RLS filtering. This will provide a range of readers with the expertise of implementing such solutions in FPGA hardware with a clear treatise of the mapping of algorithmic complexity into FPGA hardware which the authors believe is missing from current literature. The book summarizes over 30 years of learned experience.
A key focus of the book has been to look at the FPGA as a heterogeneous platform which can be used to construct complex DSP systems. In particular, we take a system-level approach, addressing issues such as system-level optimization, implementation and integration of IP cores, system communications frameworks and implementation for low power, to mention but a few. The intention is that the designer will be able to apply some of the techniques developed in the book and use the examples along with existing C-based or HDL-based tools to develop solutions for their own specific application.
Introduction to Field-programmable Gate Arrays
DSP Fundamentals
Arithmetic Basics
Technology Review
Current FPGA Technologies
Detailed FPGA Implementation Issues
Rapid DSP System Design Tools and Processes for FPGA
Architecture Derivation for FPGA-based DSP Systems
The IRIS Behavioural Synthesis Tool
Complex DSP Core Design for FPGA
Model-based Design for Heterogeneous FPGA
Adaptive Beamformer Example
Low Power FPGA Implementation
Final Statements